"If you judge people, you have no time to love them."
- Mother Teresa
8.
A float occupies 4 bytes. If the hexadecimal equivalent of these 4 bytes are A, B, C and D, then when this float is stored in memory in which of the following order do these bytes gets stored?
[A].
ABCD
[B].
DCBA
[C].
0xABCD
[D].
Depends on big endian or little endian architecture
Answer: Option E
Explanation:
No answer description available for this question.
What is 'big endian or little endian architecture'?
Please, give me the correct explanation.
Krunal said:
(Thu, Jul 1, 2010 01:52:52 PM)
"Little Endian" means that the lower-order byte of the number is stored in memory at the lowest address, and the high-order byte at the highest address. For example, a 4 byte Integer
ABCD
will be arranged in memory as follows:
Base Address+0 Byte0
Base Address+1 Byte1
Base Address+2 Byte2
Base Address+3 Byte3
Intel processors (those used in PC's) use "Little Endian" byte order.
"Big Endian" means that the high-order byte of the number is stored in memory at the lowest address, and the low-order byte at the highest address. The same 4 byte integer would be stored as:
Base Address+0 Byte3
Base Address+1 Byte2
Base Address+2 Byte1
Base Address+3 Byte0
Motorola processors (those used in Mac's) use "Big Endian" byte order.
Nishtha said:
(Tue, Jul 6, 2010 03:35:54 AM)
Thank you so much.
Souravb said:
(Sun, Jul 11, 2010 02:16:43 AM)
Thanks dude!!
Harish said:
(Sat, Aug 21, 2010 01:45:13 AM)
Thanks dude :)
Kavita said:
(Fri, Sep 10, 2010 04:14:54 AM)
Krunal was rite about the processors architecture but explanation for Little and Big Endian architecture got reversed.
Here a Proper and Correct Explanation.
Consider the storage of the value ABCD
Here,
A-MSB(Most Significant Byte).
B
C
D-LSB(Least Significant Byte).
In Little Endian Architecture, LSB is at the lowest address of the memory location. Suppose memory location starts with 0
D->0
C->1
B->2
A->3
Intel Processors(CPUs) are Little Endian.
In Big Endian Architecture, MSB is at the lowest address of the memory location. As shown below.
A->0
B->1
C->2
D->3
While Motorola 680x0 CPUs are big-endian
For more details and confirmation visit : http://en.wikipedia.org/wiki/Endianness#Big-endian
Rishabh said:
(Thu, Sep 23, 2010 06:08:28 AM)
@Kavita
Thanks for proper information. Super!
Ram said:
(Mon, Nov 29, 2010 12:18:19 AM)
Good thread guys,
thanks to every one and india bix.
Praveen Kumar said:
(Fri, Dec 24, 2010 07:26:30 AM)
Thank you so much Krunal.
Anusha said:
(Tue, Jan 11, 2011 12:53:09 AM)
Thank you Krunal and Kavitha.
I had a doubt if I had to store 01020304 in little endian, according to ur discription it is 04030201 but why it could not be 40302010 ?
Sandeep said:
(Wed, Jan 26, 2011 12:57:21 AM)
What kavitha said was up to the mark. But it is for 8 bit processors.
What we generally use are all of 16-bit processors.
So in ABCD.
CD will be allocated consecutive 2 bytes (16-bit).
And then AB will be allocated consecutive 2 bytes.
For more info refer to any microprocessors text.
Santhosh Kumar M V said:
(Sat, Feb 12, 2011 02:54:37 AM)
When designing computers, there are two different architectures for handling memory storage. They are called Big Endian and Little Endian and refer to the order in which the bytes are stored in memory. Windows NT was designed around Little Endian architecture and was not designed to be compatible with Big Endian because most programs are written with some dependency on Little Endian.
These two phrases are derived from "Big End In" and "Little End In." They refer to the way in which memory is stored. On an Intel computer, the little end is stored first. This means a Hex word like 0x1234 is stored in memory as (0x34 0x12). The little end, or lower end, is stored first. The same is true for a four-byte value; for example, 0x12345678 would be stored as (0x78 0x56 0x34 0x12). "Big End In" does this in the reverse fashion, so 0x1234 would be stored as (0x12 0x34) in memory. This is the method used by Motorola computers and can also be used on RISC-based computers. The RISC-based MIPS computers and the DEC Alpha computers are configurable for Big Endian or Little Endian. Windows NT works only in the Little Endian mode on both computers.
Windows NT was designed around Little Endian architecture. The Hardware Abstraction Layer (HAL) is written so that all operating system-related issues are automatically handled. Therefore, it is possible to create a HAL that could work on Big Endian architecture. The basic problem with porting the code has to do with the way the code is written for all programs. Code is often written with the assumption that Big Endian or Little Endian is being used. This may not be specific to the HAL; it could be something as simple as bit masking for graphics. To clarify this concept more, two programming examples follow.
James said:
(Sat, May 14, 2011 01:38:36 PM)
Thank you very much.
Moshii said:
(Fri, May 27, 2011 05:36:12 AM)
THAK YOU ALL, I have question. Why Little Endian and Big Endian?
Please give me a proper answer.
Akhilesh Kumar Yadav said:
(Sat, Jun 18, 2011 11:55:23 AM)
Manas Rajderkar said:
(Fri, Nov 4, 2011 09:00:59 PM)
Great! Santosh, and Krunal appreciable.
Aishwarya Gupta said:
(Tue, Jan 10, 2012 09:47:01 AM)
Thank you very much.
Raghu said:
(Wed, Jan 11, 2012 09:52:46 PM)
Thank you kavitha.
Shrikant said:
(Mon, Jan 30, 2012 06:47:16 PM)
Thanks Santosh.
A.Vamsi Krishna said:
(Fri, Mar 16, 2012 11:40:04 AM)
Thanks to all for this great analysis and Indiabix.
Preeti said:
(Mon, Sep 3, 2012 10:49:13 PM)
Thank you kavitha:).
Anusha said:
(Sat, Jan 19, 2013 09:03:19 PM)
Why is the concept of little or big endian followed? Why can't people stick on to 1 particular method following a standard what difference does it make?
