Digital Electronics - Memory and Storage
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Exercise"Do not wait for leaders; do it alone, person to person."
- Mother Teresa
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| 71. |
The refresh period for capacitors used in DRAMs is ________. |
Answer: Option E
Explanation:
No answer description available for this question. Let us discuss.
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| 72. |
What is the principal advantage of using address multiplexing with DRAM memory? |
| A. |
reduced memory access time | | B. |
reduced requirement for constant refreshing of the memory contents | | C. |
reduced pin count and decrease in package size | | D. |
It eliminates the requirement for a chip-select input line, thereby reducing the pin count. |
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
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| 73. |
What is a multitap digital delay line? |
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a series of inverter gates with RC circuits between each one | | B. |
a series of inverter gates with RL circuits between each one | | C. |
a series of NAND gates with RC circuits between each one | | D. |
a series of NAND gates with RL circuits between each one |
Answer: Option A
Explanation:
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| 74. |
The bit capacity of a memory that has 2048 addresses and can store 8 bits at each address is ________. |
Answer: Option D
Explanation:
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| 75. |
How many 8 k × 1 RAMs are required to achieve a memory with a word capacity of 8 k and a word length of eight bits? |
Answer: Option E
Explanation:
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| 76. |
The mask ROM is ________. |
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MOS technology | | B. |
diode technology | | C. |
resistor-diode technology | | D. |
DROM technology |
Answer: Option B
Explanation:
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| 77. |
Which of the following is not a flash memory mode or operation? |
Answer: Option D
Explanation:
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