IndiaBIX.com
Arithmetic Aptitude Data Interpretation
Logical Reasoning Verbal Reasoning Non Verbal Reasoning
General Knowledge
Sudoku Number puzzles Missing letters puzzles Logical puzzles Playing cards puzzles Clock puzzles
C Programming C++ Programming C# Programming Java Programming
Microbiology Biochemistry Biotechnology Biochemical Engineering
Civil Engineering Mechanical Engineering Chemical Engineering Networking Database Questions Computer Science Basic Electronics Digital Electronics Electronic Devices Circuit Simulation Electrical Enigneering Engineering Mechanics Technical Drawing
Placement Papers Group Disucssion HR Interview Technical Interview Body Language
Aptitude Test Verbal Ability Test Verbal Reasoning Test Logical Reasoning Test C Programming Test Java Programming Test Data Interpretation Test General Knowledge Test
Data Structures Operating Systems Networking DATABASE Database Basics SQL Server Basics SQL Server Advanced SQL Server 2008 JAVA Core Java Java Basics Advanced Java UNIX Unix File Management Unix Memory Management Unix Process Managemnt C Interview Questions The C Language Basics .NET Interview Questions .NET Framework ADO.NET ASP.NET Software Testing

Digital Electronics - Memory and Storage

@ : Home > Digital Electronics > Memory and Storage > General Questions

Exercise

"I do not seek. I find."
- Pablo Picasso
85. 

Which is not a hard disk performance parameter?

A. Seek time
B. Break time
C. Latency period
D. Access time

86. 

The ideal memory ________.

A. has high storage capacity
B. is nonvolatile
C. has in-system read and write capacity
D. has all of the above characteristics

87. 

To which pin on the RAM chip does the address decoder connect in order to signal which memory chip is being accessed?

A. The address input
B. The output enable
C. The chip enable
D. The data input

88. 

EEPROM stands for ________.

A. encapsulated electrical programmable read-only memory
B. elementary electrical programmable read-only memory
C. electrically erasable programmable read-only memory
D. elementary erasable programmable read-only memory

89. 

L1 is known as ________.

A. primary cache
B. secondary cache
C. DRAM
D. SRAM

90. 

Describe the timing diagram of a write operation.

A. First the data is set on the data bus and the address is set, then the write pulse stores the data.
B. First the address is set, then the data is set on the data bus, and finally the read pulse stores the data.
C. First the write pulse stores the data, then the address is set, and finally the data is set on the data bus.
D. First the data is set on the data bus, then the write pulse stores the data, and finally the address is set.

91. 

What is the bit storage capacity of a ROM with a 1024 × 8 organization?

A. 1024B. 2048
C. 4096D. 8192




© 2008-2013 by IndiaBIX™ Technologies. All Rights Reserved | Copyright | Terms of Use & Privacy Policy

Contact us: info@indiabix.com     Follow us on twitter!