Digital Electronics - Memory and Storage
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Exercise"I do not seek. I find."
- Pablo Picasso
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| 85. |
Which is not a hard disk performance parameter? |
| A. |
Seek time | | B. |
Break time | | C. |
Latency period | | D. |
Access time |
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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| 86. |
The ideal memory ________. |
| A. |
has high storage capacity | | B. |
is nonvolatile | | C. |
has in-system read and write capacity | | D. |
has all of the above characteristics |
Answer: Option B
Explanation:
No answer description available for this question. Let us discuss.
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| 87. |
To which pin on the RAM chip does the address decoder connect in order to signal which memory chip is being accessed? |
| A. |
The address input | | B. |
The output enable | | C. |
The chip enable | | D. |
The data input |
Answer: Option C
Explanation:
No answer description available for this question. Let us discuss.
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| 88. |
EEPROM stands for ________. |
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encapsulated electrical programmable read-only memory | | B. |
elementary electrical programmable read-only memory | | C. |
electrically erasable programmable read-only memory | | D. |
elementary erasable programmable read-only memory |
Answer: Option E
Explanation:
No answer description available for this question. Let us discuss.
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| 89. |
L1 is known as ________. |
| A. |
primary cache | | B. |
secondary cache | | C. |
DRAM | | D. |
SRAM |
Answer: Option A
Explanation:
No answer description available for this question. Let us discuss.
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| 90. |
Describe the timing diagram of a write operation. |
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First the data is set on the data bus and the address is set, then the write pulse stores the data. | | B. |
First the address is set, then the data is set on the data bus, and finally the read pulse stores the data. | | C. |
First the write pulse stores the data, then the address is set, and finally the data is set on the data bus. | | D. |
First the data is set on the data bus, then the write pulse stores the data, and finally the address is set. |
Answer: Option C
Explanation:
No answer description available for this question. Let us discuss.
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| 91. |
What is the bit storage capacity of a ROM with a 1024 × 8 organization? |
Answer: Option C
Explanation:
No answer description available for this question. Let us discuss.
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